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CPU_SHIXIAN
- 模拟计算机的各种算术运算和逻辑运算，配合硬件板子使用显示屏，显示过程及结果。-The purpose of this project is to design a simple CPU (Central Processing Unit). This CPU has basic instruction set, and we will utilize its instruction set to generate a very simple program to verify its perfor
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- 能将字符型的指令自定义地编译成二进制码，用来学习设计自己的CPU-Can be character-type instructions can be compiled into a binary code, used to learn to design their own CPU
traffic_light
- 设计一个简单的交通灯控制器，交通灯显示用实验箱的交通灯模块来显示。系统时钟选择时钟模块的1Hz时钟，黄灯闪烁时钟要求为1Hz，红灯15s，黄灯5s，绿灯15s。系统中用CPU板上的复位按键进行复位。(Design a simple traffic light controller, traffic lights show the use of the experimental box traffic lights module to display. System clock select cl
FreeRTOS中文实用教程
- 在嵌入式领域中，嵌入式实时操作系统正得到越来越广泛的应用。采用嵌入式实时操作系统(RTOS)可以更合理、更有效地利用CPU的资源，简化应用软件的设计，缩短系统开发时间，更好地保证系统的实时性和可靠性。(Embedded real-time operating system is becoming more and more widely used in the field of embedded systems. Using embedded real-time operating system
AN10859_NXP
- 恩智浦官方例程，附有中文说明，适合学习。(This software was adapted to work with a Keil MCB1700 board and the Keil RV ARM C-Compiler with as few modifications as possible. Note that modifications are not optimal, because ARM is a 32-bit machine while the original
基于ucos_ii的贪食蛇游戏设计
- 基于51单片机ucos系统游戏设计。并且实施显示cpu占用以及内存占用(Game design of UCOS system based on 51 single chip microcomputer. And implementation shows CPU occupancy as well as memory footprint)
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- Another set of LC3 CPU VHDL source code and design documents, of LC3 to a number of trade-offs and transformation, such as NZP changed NZC, more close to reality CPU hardware architecture. In accordance with the ASM to VHDL coding, digital design mor
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- Another set of LC3 CPU VHDL source code and design documents, of LC3 to a number of trade-offs and transformation, such as NZP changed NZC, more close to reality CPU hardware architecture. In accordance with the ASM to VHDL coding, digital design mor
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- Another set of LC3 CPU VHDL source code and design documents, of LC3 to a number of trade-offs and transformation, such as NZP changed NZC, more close to reality CPU hardware architecture. In accordance with the ASM to VHDL coding, digital design mor
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- Another set of LC3 CPU VHDL source code and design documents, of LC3 to a number of trade-offs and transformation, such as NZP changed NZC, more close to reality CPU hardware architecture. In accordance with the ASM to VHDL coding, digital design mor
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- Another set of LC3 CPU VHDL source code and design documents, of LC3 to a number of trade-offs and transformation, such as NZP changed NZC, more close to reality CPU hardware architecture. In accordance with the ASM to VHDL coding, digital design mor
BusyBoxFree
- Linux是一套免费使用和自由传播的类Unix操作系统，是一个基于POSIX和UNIX的多用户、多任务、支持多线程和多CPU的操作系统。它能运行主要的UNIX工具软件、应用程序和网络协议。它支持32位和64位硬件。Linux继承了Unix以网络为核心的设计思想，是一个性能稳定的多用户网络操作系统。(Linux is a free and free Unix like operation system. It is an operation system based on POSIX and UN
S7-200与RS485设备通讯实例
- WB系列智能电量传感器可以对各种交、直流电量参数进行实时采集计算、分析,它具有RS485智能端口，可以同PLC、工控机进行通讯，也可以多个WB智能传感器组成RS485网。本文将详细介绍WB智能电量传感器与西门子PLC S7-200 CPU的通讯方法，包括硬件的连接和软件的编程。(For AC. and DC. Parameters , WB Intelligent Sensor can real-time collect , calculate and analyse. WB Intellige
ST2616F61--0419
- 1、 基于高速同步串行总线的多CPU板间互联技术（智能电网）（著作权1、实用新型1） ST320S智能配电终端（升级方案） 主要负责人：李孟庆 主要内容：随着客户对DTU的要求不断提高，当前的CAN总线的数据传输方式已无法满足要求，于是提出采用SPI（Serial Peripheral Interface）通信方式来提高当前通信率。SPI原先的设计主要是在板内芯片间的通信，如果应用于板间的通信需考虑驱动能力与抗干扰性。(1. Multi-cpu board interconnection
T1
- 基于汇编语言开发设计DAC1210与CPU 8051/52的接口电路，输出0-5V的周期锯齿波，频率可调，并提供DAC0832的仿真电路，可在proteus软件上结合示波器进行仿真模拟，供大家进行基础学习选择使用。.(Based on assembly language, we develop and design the interface circuit between DAC1210 and CPU 8051/52, output the periodic sawtooth wave of
单片机电子时钟设计
- 单片微型计算机简称单片机，又称为微控制器，是将CPU、RAM、ROM、定时/计数器、I/O接口电路集成到一块电路芯片上构成的微型计算机。本次设计的系统由单片机系统、数码管显示系统、键盘、蜂鸣器等组成，通过按键来控制单片机实现数字时钟的时、分、秒显示，12、24制转换，设定时间、闹钟等不同功能，并通过P0口的输出在LED上显示。该设计具有结构简单、使用方便等特点。(As the single chip computer, also known as micro controller, CPU, R
ccsuemupc条件跳转(1)
- 设计一个模型机，具体设计要求如下： （1）设计指令系统，要求有取数指令、加法指令、跳转指令、停机指令等 （2）设计指令格式、微指令格式 、微程序 、时序电路 、数据通路，完成cpu的设计。 （3）利用模块化设计，分别设计存储器模块、运算器模块、时序电路模块、微程序控制器模块、显示模块等，最后进行系统的顶层设计，完成复杂模型机的设计与实现测试 （4）根据任务，完成主程序的设计，同时把主程序翻译成目标代码，写入主存，仿真下载测试。(Design a model machine, th